Event 2011 - Call for Papers

CALL FOR PAPERS

Scope -- Submissions -- Key Dates -- Additional Information

Scope

3D Integration is a promising technology for extending Moore’s momentum in the next decennium, offering heterogeneous technology integration, higher transistor density, faster interconnects, and potentially lower cost and time-to-market. But in order to produce 3D chips, new capabilities are needed: process technology, architectures, design methods and tools, and manufacturing test solutions. The goal of this Workshop is to bring together researchers, practitioners, and others interested in this exciting and rapidly evolving field, in order to update each other on the latest state-of-the-art, exchange ideas, and discuss future challenges. The prior edition of this workshop took place in conjunction with DATE 2009 and DATE 2010.

The areas of interest include (but are not limited to) the following topics:

3D technologies: chip-on-chip, micro-bumping, contactless, and through-silicon-vias interconnect
TSV formation, perm./temp. wafer (de-)bonding
3D architectures and design space exploration
3D combinations of logic, memory, analog, RF
Application, product, or test chip case studies
3D design methods and EDA tools
Signal and power integrity, and ESD in 3D
Thermo(-mechanical) analysis and -aware design
Chip-package co-design for 3D
Test, design-for-test, and debug techniques for 3D
Wafer test access, KGD test, thin-wafer handling
Economic benefit/cost trade-off studies
Standardization initiatives

Submissions

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Submissions are invited in the form of (extended) abstracts not exceeding two pages and must be sent in as PDF file to damien.riquet@st.com and Nikolaos.Minas@imec.be with “DATE11-3D-WS” as subject. All submissions will be evaluated for selection with respect to their suitability for the workshop, originality, and technical soundness. Selected submissions can be accepted for regular or poster presentation. At the workshop, an Electronic Workshop Digest will be made available to all workshop participants, which will include all material that authors are willing to provide: abstract, paper, slides, poster, etc.

Key Dates

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Submission deadline: November 15, 2010
Notification of acceptance: December 1, 2010
Final copy deadline: February 25, 2011

Additional Information

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Yuan Xie – General Chair
Computer Science & Engineering Dept.
Pennsylvania State University
Email: yuanxie@cse.psu.edu

Damien Riquet– Program Co-Chair
STMicroelectronics SA
850, rue Jean Monnet
F-38926 Crolles Cedex
Email: damien.riquet@st.com

Nikolaos Minas – Program Co-Chair
IMEC
Kapeldreef 75
3001 Leuven, Belgium
E-mail: Nikolaos.Minas@imec.be

For more information, visit us on the web at:
http://www.date-conference.com/conference/date11-workshop-W5

The DATE 2011 Friday Workshop on 3D Integration - Applications, Technology, Architecture, Design, Automation, and Test - is sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council (TTTC).